Multi-layer PCB is often used in high-speed PCB design, in which via design plays an important role. Via is composed of drill hole, pad area around hole and POWER layer isolate area. Next, let's take a look at the problems and design requirements of vias in high-speed PCB.
Influence of vias on high speed PCB
In high-speed PCB multi-layer boards, the signal transmission from one layer of interconnection to another layer of interconnection needs to be connected through vias. When the frequency is lower than 1 GHz, vias can play a good role in connection. Its parasitic capacitance and inductance can be ignored. When the frequency is higher than 1 GHz, the parasitic effect of the via cannot be ignored on the signal integrity. At this time, the via appears as a discontinuous impedance breakpoint on the transmission path, which will cause signal integrity problems such as reflection, delay, and attenuation.
When the signal is transmitted to another layer through the vias, the reference layer of the signal line is also used as the return path of the via signal. The return current will flow between the reference layers through the capacitive coupling, and cause problems such as ground bounce.
Types of via
Generally, vias can be classified into three categories: through holes, blind vias and buried vias.
Blind via: it is located on the top and bottom surfaces of the printed circuit board with a certain depth, which is used to connect the surface circuit and the underlying inner circuit. The depth and the diameter of the via do not exceed a certain ratio.
Buried via: it refers to the connection via located in the inner layer of the printed circuit board, which does not extend to the surface of the circuit board.
Through hole: it passes through the entire circuit board and can be used for internal interconnection or as the installation and positioning hole of components. Since the through hole is easier to be drilled in the process and lower in cost, it is often used in PCB.
Via design of high speed PCB
The seemingly simple vias often bring great negative effects to the circuit design in the high-speed PCB design. In order to reduce the adverse effects caused by the parasitic effect of vias, the following measures can be taken in the design:
(1) Choose a reasonable via size. For the design of multi-layer PCB with general density, it is better to use vias of 0.25mm/ 0.51mm/ 0.91mm (drilled holes/ pads/ POWER isolation area); for PCBs with high density, it is suggested to use vias of 0.20mm/ 0.46mm/ 0.86mm or non-through vias; for the vias of power supply or ground wire, it is considered to use a larger size to reduce impedance;
(2) The larger the POWER isolation area, the better. Considering the via density on PCB, D1 = D2 + 0.41 is generally adopted;
(3) The signal traces on the PCB should not be changed as much as possible, that is to say, the vias should be reduced as much as possible;
(4) The use of a thin PCB is conducive to reducing the two parasitic parameters of the via;
(5) The pins of the power supply and ground should be close to the vias. The shorter the lead between the vias and the pins, the better, because they will increase the inductance. At the same time, the power and ground leads should be as thick as possible to reduce impedance;
(6) Place some grounding vias near the vias of the signal layer to provide a short-distance loop for the signal.
In addition, the length of the via is also one of the main factors affecting the inductance of the via. For the via used for the top and bottom layers, the via length is equal to the PCB thickness. Due to the increasing number of PCB layers, the PCB thickness often reaches more than 5 mm.
However, in order to reduce the problems caused by vias in the design of high-speed PCB, the length of vias is generally controlled within 2.0mm. For vias longer than 2.0 mm, the continuity of via impedance can be improved to a certain extent by increasing the via diameter. When the length of via is 1.0 mm or less, the optimal via diameter is 0.20 mm ~ 0.30 mm.